Commit Graph
5016 Commits
Author SHA1 Message Date
KITAITI MakotoandDaniel Bevenius 642b5d3260 ruby : Add #free method, check MemoryView strictly (#4032)
* Bump version to 1.3.9

* Fix JFKReader's format

* Add Whisper::Context#free

* Add test for Whisper::Context#free

* Add Whisper::Context#free to RBS

* Add Whisper::VAD::Context#free

* Add test for Whisper::VAD::Context#free

* Add Whisper::VAD::Context#free to RBS

* Add Parakeet::Context#free

* Add test for Parakeet::Context#free

* Add Parakeet::Context#free to RBS

* Check MemoryView format more strictly

* Fallback MemoryView flags to SIMPLE when MemoryView not available

* Add changelog entries

* Update document on callbacks

* Remove whitespace

Co-authored-by: Daniel Bevenius <daniel.bevenius@gmail.com>

---------

Co-authored-by: Daniel Bevenius <daniel.bevenius@gmail.com>
2026-09-04 14:33:37 +09:00
Ben Younes eacbd8234c whisper : default-initialize whisper_mel to avoid uninitialized read (#3981)
whisper_full()/whisper_full_with_state() only compute the mel spectrogram when
n_samples > 0. For n_samples == 0 on a freshly allocated state the mel is never
touched, but struct whisper_mel had no member initializers, so n_len / n_len_org
/ n_mel were indeterminate heap garbage (the state is allocated with
new whisper_state). seek_end is derived from that garbage and, depending on it,
the call either quietly returns 0 or runs the encoder with garbage dimensions
over an empty (NULL) mel buffer, dereferencing address 0 in the mel copy loop.

Give whisper_mel default member initializers so a never-computed mel reads as
0 frames and the n_samples == 0 case deterministically takes the existing
too-short path.

Fixes #3978
2026-08-31 05:53:57 +02:00
Jhen-Jie Hong c4ac0012a8 parakeet : fix TDT decode by outputting raw logits from the joint graph (#4017) 2026-08-29 05:28:05 +02:00
Georgi Gerganov 978113305b talk-llama : sync llama.cpp 2026-08-25 15:28:56 +03:00
Georgi Gerganov 3680f66fa4 pi : init 2026-08-25 15:28:56 +03:00
Georgi Gerganov 0414519d7f sync : ggml 2026-08-25 15:28:56 +03:00
Georgi Gerganov d470c9d469 ggml : bump version to 0.22.0 (ggml/1607)
* ggml : bump version to 0.22.0

* scripts : update default release desc
2026-08-25 15:28:56 +03:00
Neo Zhang 322a77cf6d sycl : mark tq2_0 as not supported (llama/27660) 2026-08-25 15:28:56 +03:00
fairydreamingandStanisław Szymczyk 17a522a8cc webgpu : fix handling of infinity values during ARGSORT and TOP_K (llama/27538)
Co-authored-by: Stanisław Szymczyk <sszymczy@gmail.com>
2026-08-25 15:28:56 +03:00
YiChen LvandGeorgi Gerganov fa3b87c188 metal : per-device tuned (Q, NE) for flash-attn vec (llama/26570)
* metal : per-device tuned (Q, NE) for flash-attn vec (llama/25750)

* rebase Q-generic FA vec body from 01dc93607 (llama/23114)

* add 53 f16 (Q,NE) flash-attn vec instantiations (vec 80 -> 133)

* add FA vec (Q,NE) tuning table + dispatch wiring + SMEM cap fallback

* add  FA vec (Q,NE) perf sweep

* fill tuning result

* fold family table into a per-family representative SKU

* refactor tuning result format

* extend FA vec tuning to quantized KV caches

* sync fa vec tuner bucketing with runtime, use pointwise tuning regret

* update tuned table

* format and cleanup

* prefix fa_vec tuning procs with ggml_backend_metal_tuning_, drop unused fa_vec_override_active

* add device id -> token lookup for the offline tuning tool

* add ggml-metal-tuning skeleton

* add op-agnostic perf cell + median timing for the tuner

* add FA-vec graph build + tensor init to the tuner

* tools : add FA-vec (Q,NE) sweep, compression and table emit

* cool down and re-measure the dirty window on thermal drift

* test-backend-ops : replace the FA vec tune mode with a bounded (Q,NE) slice

* tools : document the Metal tuner, point the table comment at it

* abort on unknown KV type, single-source fa_vec_legal_ne

* cleanup

* honor -o in the FA vec (Q,NE) slice

* retune FA-vec (Q, NE) under a pointwise no-harm gate

* cont : add fa-vec tunings for M1 Pro, M2 Ultra, M5 Max

---------

Co-authored-by: Georgi Gerganov <ggerganov@gmail.com>
2026-08-25 15:28:56 +03:00
Georgi Gerganov fe52277c1f sync : ggml 2026-08-25 15:28:56 +03:00
YiChen Lv b15d31d0fd metal: per-op source split + parallel compile (llama/26561) 2026-08-25 15:28:56 +03:00
Georgi Gerganov 4257445149 scripts : update ggml-am 2026-08-25 15:28:56 +03:00
Georgi Gerganov 1d8e05291a sync : ggml 2026-08-25 15:28:56 +03:00
Georgi Gerganov aa25d33f58 ggml : shorten virtual device naming in CUDA and Metal (llama/27608)
* ggml : shorten virtual device naming in CUDA and Metal

Assisted-by: llama.cpp:DeepSeek-V4-Flash-0731

* ggml-metal : build device description at init

Assisted-by: llama.cpp:DeepSeek-V4-Flash-0731

* cont : naming
2026-08-25 15:28:56 +03:00
fairydreamingandStanisław Szymczyk 103305e656 webgpu : reorder includes since V that appears in common_decls.tmpl may be defined as K in flash_attn_decls.tmpl if KV_OVERLAP (llama/27545)
Co-authored-by: Stanisław Szymczyk <sszymczy@gmail.com>
2026-08-25 15:28:56 +03:00
Georgi Gerganov 32d0f49ddc ggml : fix ggml_clamp (llama/27644)
* ggml : fix ggml_clamp

* cont : update ggml-alloc
2026-08-25 15:28:56 +03:00
Aman Gupta 20209c25f7 Deepseek 4: -sm tensor (llama/26490)
* DSV4: sm tensor

* set coarser granularity for head splits

* fix dspark

* add model saving for dsv4 + allow dflash to return on specific device

* add comment about dsv4 seq_rm

* simplify

* add shared expert delayed allreduce

* remove special test for dsv4
2026-08-25 15:28:56 +03:00
Gaurav Garg 3b89b37c30 Fix meta tensor split state propagation (llama/27574)
* ggml : fix meta tensor split state propagation

* Add test-llama-archs to CI
2026-08-25 15:28:56 +03:00
Aman Karki c8a40099fa cuda : add POOL_1D support (llama/27573)
* cuda : add POOL_1D support

* fix: add missing trailing newline for editorconfig compliance
2026-08-25 15:28:56 +03:00
Safi UllahandJeff Bolz 13a7856daa vulkan : added the PAD_REFLECT_1D operation (llama/26586)
* vulkan : added PAD_REFLECT_1D operation

Implemented the GGML_OP_PAD_REFLECT_1D operation for the Vulkan backend

Changes:
- pad_reflect_1d.comp: implemented the GLSL compute shader with reflection logic
- vulkan-shaders-gen.cpp: register the shader for SPIR-V compilation
- ggml-vulkan.cpp: pushed constants struct, pipeline creation,
  supports_op, dispatch function, compute switch and debug validation

Tested the PAD_REFLECT_1D on Intel Iris Xe (Vulkan 1.4, Mesa 25.2.8):

Correctness:
  PAD_REFLECT_1D(type=f32,ne_a=[512,34,2,1],pad_0=10,pad_1=9) = Pass
  PAD_REFLECT_1D(type=f32,ne_a=[3000,384,4,1],pad_0=10,pad_1=9) = Pass
  2/2 tests passed
 - All test are passed

Performance:
  ne_a=[512,34,2,1] -> 5.38 us/run, 24.55 GB/s
  ne_a=[3000,80,1,1] -> 30.09 us/run, 59.62 GB/s
  ne_a=[3000,384,4,1] -> 158.31 us/run, 54.39 GB/s

* Update ggml/src/ggml-vulkan/vulkan-shaders/pad_reflect_1d.comp

Co-authored-by: Jeff Bolz <jbolz@nvidia.com>

---------

Co-authored-by: Jeff Bolz <jbolz@nvidia.com>
2026-08-25 15:28:56 +03:00
Kartik SirohiandSigbjørn Skjæret 1efb31e6fd ggml: optimize concat op by replacing per-element memcpy with row-level memcpy (llama/24575)
* ggml: optimize concat op by replacing per-element memcpy with row-level memcpy

* ggml: fix concat offsets for row-level copies

* ggml: add concat row contiguity asserts

* ggml: move concat block size asserts

* ggml: remove redundant concat asserts

* Update ggml/src/ggml-cpu/ops.cpp

Co-authored-by: Sigbjørn Skjæret <sigbjorn.skjaeret@huggingface.co>

---------

Co-authored-by: Sigbjørn Skjæret <sigbjorn.skjaeret@huggingface.co>
2026-08-25 15:28:56 +03:00
Sigbjørn Skjæret 21a67dd8da sycl : add Q2_K reordered MMVQ and ESIMD kernels (again) (llama/27490)
* Revert "Revert "sycl : add Q2_K reordered MMVQ and ESIMD kernels (#26336)" (#…"

This reverts commit 7a0e42fd01fb0acda644e4f04b1f1acbbb9e23ba.

* add gate params
2026-08-25 15:28:56 +03:00
Hongqiang Wang 5f7bd9ddb9 opencl: fold the gpt-oss MoE per-expert bias adds into the epilogue (op/kernel fusion) (llama/26431)
* opencl: fold the gpt-oss MoE bias adds into swiglu_oai

Default on, opt out with GGML_OPENCL_FUSE_MOE_BIAS_GLU=0.

* opencl: fold the MoE down-projection bias into the combine

Default on, opt out with GGML_OPENCL_FUSE_MOE_BIAS_COMBINE=0.
2026-08-25 15:28:56 +03:00
Ben YounesandBen Younes a722846cb6 whisper : guard null source in buffer loader read callback (#3982)
* whisper : guard null source in buffer loader read callback

whisper_init_from_buffer_with_params_no_state installs a read callback that
copies from buf->buffer + current_offset. When the buffer is exhausted (or the
supplied buffer is empty), size_to_copy is 0 and the source pointer can be null;
passing a null pointer to memcpy is undefined behavior even for a zero-length
copy (UBSan: 'null pointer passed as argument 2' at the memcpy). Loading a
crafted/short model through the buffer loader could hit this.

Skip the memcpy when there is nothing to copy. Loading from a null/empty or
truncated buffer now fails gracefully (returns NULL) with no UB.

This addresses bug 1 of #3879. Bug 2 (integer overflow when sizing the mel
filter buffer) is covered by the open PR #3780.

* fixup! whisper : guard null source in buffer loader read callback

---------

Co-authored-by: Ben Younes <2910651+ousamabenyounes@users.noreply.github.com>
2026-08-25 12:40:19 +02:00
Daniel Bevenius c122757fdd docs : center badges in README.md [no ci] (#4012) 2026-08-24 12:36:17 +02:00
berney 25694098b8 devops : add main-rocm Dockerfile (#3975) 2026-08-24 11:40:24 +02:00
52dec9d889 vitisai : add VitisAI Plugin for AMD Ryzen AI NPU encoder offload (#3608)
* Add VitisAI Plugin

* Added VitisAI encoder module placeholder files

* VitisAI build integration

* VitisAI encoder offload functional

* Clean up vitisai integration

* Add c++17 requirement for Windows

* Enabled preemption for windows runs

* Add model cache override option

* Remove vitisai premature log message

* Add rai support through file mapping

* Fixed flatbuffer loading

* Fixed Windows file mapping issue

* Update FlexmlRT resolution

* Use Flexmlrt wheel pkg to build VitisAI plugin

* Clean up

* Remove prints

* Change flexmlrt target from Shared to Interface

* Add c++17 requirement for Windows

* Enabled preemption for windows runs

* Add rai support through file mapping

* Fixed flatbuffer loading

* Fixed Windows file mapping issue

* Update FlexmlRT resolution

* Use Flexmlrt wheel pkg to build VitisAI plugin

* Clean up

* Remove prints

* Change flexmlrt target from Shared to Interface

* Cleanup FlexmlRT integration

* format fix

* Adding AMD Licenses

* Update CMakeLists.txt

Co-authored-by: Kumawat, Sachin <sachin.kumawat@amd.com>

* Update src/CMakeLists.txt

Co-authored-by: Kumawat, Sachin <sachin.kumawat@amd.com>

* Update whisper.cpp

* Added VitisAI encoder readme section

* Remove license headers from common files to whisper.cpp

---------

Co-authored-by: Sachin Kumawat <sachink@amd.com>
Co-authored-by: Jeff Lin <jeffylin@xilinx.com>
Co-authored-by: Lin <jefflin@amd.com>
Co-authored-by: Lin, Jeff (DCG-ENG) <jeff.lin@amd.com>
Co-authored-by: Iswarya Alex <iswaryaalex96@gmail.com>
Co-authored-by: Alex, Iswarya <Iswarya.Alex@amd.com>

* Update README.md

- RAI EULA Links
- Updated for RAI Whisper instructions

* Cleanup and add runtime print debug guard

* turn off profiling

* Add VitisAI Plugin

* Added VitisAI encoder module placeholder files

* VitisAI build integration

* VitisAI encoder offload functional

* Clean up vitisai integration

* Add c++17 requirement for Windows

* Enabled preemption for windows runs

* Add model cache override option

* Remove vitisai premature log message

* Add rai support through file mapping

* Fixed flatbuffer loading

* Fixed Windows file mapping issue

* Update FlexmlRT resolution

* Use Flexmlrt wheel pkg to build VitisAI plugin

* Clean up

* Remove prints

* Change flexmlrt target from Shared to Interface

* Add c++17 requirement for Windows

* Enabled preemption for windows runs

* Add rai support through file mapping

* Fixed flatbuffer loading

* Fixed Windows file mapping issue

* Update FlexmlRT resolution

* Use Flexmlrt wheel pkg to build VitisAI plugin

* Clean up

* Remove prints

* Change flexmlrt target from Shared to Interface

* Cleanup FlexmlRT integration

* format fix

* Adding AMD Licenses

* Update CMakeLists.txt

Co-authored-by: Kumawat, Sachin <sachin.kumawat@amd.com>

* Update src/CMakeLists.txt

Co-authored-by: Kumawat, Sachin <sachin.kumawat@amd.com>

* Update whisper.cpp

* Added VitisAI encoder readme section

* Remove license headers from common files to whisper.cpp

---------

Co-authored-by: Sachin Kumawat <sachink@amd.com>
Co-authored-by: Jeff Lin <jeffylin@xilinx.com>
Co-authored-by: Lin <jefflin@amd.com>
Co-authored-by: Lin, Jeff (DCG-ENG) <jeff.lin@amd.com>
Co-authored-by: Iswarya Alex <iswaryaalex96@gmail.com>
Co-authored-by: Alex, Iswarya <Iswarya.Alex@amd.com>

* Cleanup and add runtime print debug guard

* Update README.md

- RAI EULA Links
- Updated for RAI Whisper instructions

* turn off profiling

* Let flexmlrt detect device type

* Add VitisAI model download scripts

* Add encoder + cross projection layer offload

* Add self hosted runner for amd npu

* Update runner

* Update workflow for linux

* Update workflow for linux

* Update flexmlrt packages for linux

* Update flexmlrt packages for linux

* Updated README

* readme: clarify xrt

* readme: clarify xrt

* ci: update test config

* Added supported plarform details with python 3.12 requirement for Linux

* Use refactored helpers

* Deprecate cross_proj .rai naming and cleanup

* Remove stale function code

* Fix: formatting

---------

Co-authored-by: Jeff Lin <jeffylin@xilinx.com>
Co-authored-by: Lin <jefflin@amd.com>
Co-authored-by: Lin, Jeff (DCG-ENG) <jeff.lin@amd.com>
Co-authored-by: Iswarya Alex <iswaryaalex96@gmail.com>
Co-authored-by: Alex, Iswarya <Iswarya.Alex@amd.com>
Co-authored-by: Iswarya Alex <47045679+iswaryaalex@users.noreply.github.com>
2026-08-24 08:02:30 +02:00
Mostafa 233fe1fc9b whisper : bypass cross-attention scaling for OpenVINO backend (#3997)
* whisper : bypass cross-attention scaling for OpenVINO backend

* whisper : use correct gating flag
2026-08-22 07:14:11 +02:00
Daniel Bevenius 51de5e8bb0 openvino : update model conversion and README.md (#4003)
This commit updates the OpenVINO model conversion script and its
dependencies as they were currently not working.

The first issue was an import that needed updating for fix the following
error:
```console
  (openvino_conv_env) $ python convert-whisper-to-openvino.py --model base.en
  Traceback (most recent call last):
    File "/home/danbev/work/ai/whisper-work/models/convert-whisper-to-openvino.py", line 6, in <module>
      from openvino.runtime import serialize
  ModuleNotFoundError: No module named 'openvino.runtime'
```
And after that there was a missing dependency:
```console
ModuleNotFoundError: No module named 'onnxscript'
```

With the changes in this commit I was able to successfully convert the model
and run the inference using OpenVINO.
2026-08-22 07:13:26 +02:00
Daniel Bevenius 3391d6b6f9 scripts : add release.sh script (#4010)
* scripts : add release.sh script [no ci]

This commit adds a release.sh script similar to what ggml and llama.cpp
have to prepare a release.

* scripts : use sed_inplace [no ci]
2026-08-22 07:12:42 +02:00
Daniel Bevenius a4610c78bf docs : add release badge and remove stable/roadmap [no ci] (#4009)
This commit updates the README.md to include a release badge.

The motivation for this is that we have been manually updating the
Stable link in this document for releases. Removing this means that we
don't have to touch this file and only update CMakeLists.txt.

I also removed the link to the Roadmap was it felt out of place and it
has not been kept up to date so I hope that is alright.

I'll follow up with a PR to introduce a release script that will help
assist the creation of releases (updateing the version and creating the
release PR etc).
2026-08-22 07:12:05 +02:00
Daniel Bevenius ab578879ec make : add --parallel to cmake build command (#4007)
This commit adds the --parallel flag to the cmake build command to
speed up compilation. This will hopefully help a little with CI runs
even though the are often limited to 2 cores.
2026-08-22 07:11:20 +02:00
Georgi Gerganov 45f1593fd3 sync : ggml 2026-08-21 19:23:26 +03:00
Georgi Gerganov ce77728c06 Revert "sycl : add Q2_K reordered MMVQ and ESIMD kernels (llama/26336)" (llama/27486)
This reverts commit ff14356e0caf6988f61f1f15f9dfe7d5ab398271.
2026-08-21 19:23:26 +03:00
Georgi Gerganov 0d9ba28cde ggml : bump version to 0.21.0 (ggml/1597) 2026-08-21 19:23:26 +03:00
Charles Xu d6c416e222 kleidiai : add SME2 F32 GEMV kernel support (llama/26891) 2026-08-21 19:23:26 +03:00
Todd Malsbary d60ef65077 sycl : add Q2_K reordered MMVQ and ESIMD kernels (llama/26336)
* Add DMMV Q4_K and Q6_K ESIMD kernels

Configure cmake build with -DGGML_SYCL_ESIMD=ON to enable.

Signed-off-by: Todd Malsbary <todd.malsbary@intel.com>

* Refactor ESIMD kernels to share common code

Signed-off-by: Todd Malsbary <todd.malsbary@intel.com>

* Move control of ESIMD from compile to runtime

Signed-off-by: Todd Malsbary <todd.malsbary@intel.com>

* Use ESIMD by default when available

Signed-off-by: Todd Malsbary <todd.malsbary@intel.com>

* Fix possible error when using ESIMD by default

While not an issue in the current version, this will become an
issue when additional QK ESIMD kernels are added (such as Q2_K).

Signed-off-by: Todd Malsbary <todd.malsbary@intel.com>

* Add explicit unroll to ESIMD kernels

Signed-off-by: Todd Malsbary <todd.malsbary@intel.com>

* Tidy up ESIMD kernels a bit

Signed-off-by: Todd Malsbary <todd.malsbary@intel.com>

* Add a reordered Q2_K MMVQ kernel

Signed-off-by: Todd Malsbary <todd.malsbary@intel.com>

* Add DMMV Q2_K ESIMD kernel

Signed-off-by: Todd Malsbary <todd.malsbary@intel.com>

---------

Signed-off-by: Todd Malsbary <todd.malsbary@intel.com>
2026-08-21 19:23:26 +03:00
Todd Malsbary b1cb805965 sycl : Add Q5_K ESIMD kernel (llama/26376)
* Add DMMV Q4_K and Q6_K ESIMD kernels

Configure cmake build with -DGGML_SYCL_ESIMD=ON to enable.

Signed-off-by: Todd Malsbary <todd.malsbary@intel.com>

* Refactor ESIMD kernels to share common code

Signed-off-by: Todd Malsbary <todd.malsbary@intel.com>

* Move control of ESIMD from compile to runtime

Signed-off-by: Todd Malsbary <todd.malsbary@intel.com>

* Use ESIMD by default when available

Signed-off-by: Todd Malsbary <todd.malsbary@intel.com>

* Fix possible error when using ESIMD by default

While not an issue in the current version, this will become an
issue when additional QK ESIMD kernels are added (such as Q2_K).

Signed-off-by: Todd Malsbary <todd.malsbary@intel.com>

* Add explicit unroll to ESIMD kernels

Signed-off-by: Todd Malsbary <todd.malsbary@intel.com>

* Tidy up ESIMD kernels a bit

Signed-off-by: Todd Malsbary <todd.malsbary@intel.com>

* Add DMMV Q5_K ESIMD kernel

Signed-off-by: Todd Malsbary <todd.malsbary@intel.com>

* Remove redundant copyright notice

Signed-off-by: Todd Malsbary <todd.malsbary@intel.com>

---------

Signed-off-by: Todd Malsbary <todd.malsbary@intel.com>
2026-08-21 19:23:26 +03:00
Hongqiang WangandLi He 2cb52ddbc0 opencl: keep the vocab-scale K-quant lm_head on the CPU for Adreno A7X (compiler issue workaround) (llama/26440)
* opencl: keep the vocab-scale K-quant lm_head on the CPU on the Adreno A7X

* opencl: revise comments

---------

Co-authored-by: Li He <lih@qti.qualcomm.com>
2026-08-21 19:23:26 +03:00
HumerousGorgonandNeo Zhang af74f97965 sycl: Update gate logic for Alchemist GPUs regarding OneDNN features. (llama/26635)
* feat: updated gating logic of fattn-onednn.cpp

* verified device types

* Update ggml/src/ggml-sycl/fattn-onednn.cpp

Accepted recommendations to add bmg_g31 arch.

Co-authored-by: Neo Zhang <zhang.jianyu@outlook.com>

* Improved SPDA gate, added documentation.

* Added arch var to reworked gate, fixing build errors.

* Fix trailing whitespaces.

---------

Co-authored-by: Neo Zhang <zhang.jianyu@outlook.com>
2026-08-21 19:23:26 +03:00
Ian Faust f19250e5ac sycl: fix multiple warnings in compiling sycl backend (llama/26713)
* Update norm.cpp

* Update helper.hpp

* Update im2col.cpp

* Update fattn-mkl.cpp

* Update element_wise.cpp

* Update fattn-mkl.cpp

* Update set_rows.cpp

* Update element_wise.cpp

* Update ggml-sycl.cpp

* Update ggml-sycl.cpp

* Update ggml-sycl.cpp

* Update ggml-sycl.cpp

* Update ggml-sycl.cpp

* Update norm.cpp

* Update CMakeLists.txt

* Update CMakeLists.txt

* Update CMakeLists.txt

* Update ggml-sycl.cpp
2026-08-21 19:23:26 +03:00
Neo Zhang 12137c316d sycl : fix load model with mlock issue (llama/27250) 2026-08-21 19:23:26 +03:00
Xuan-Son Nguyen 5656e44ea2 ggml: support ggml_rope_set_offset on opencl, sycl, wgpu, hexagon (llama/27345)
* ggml: support ggml_rope_set_offset on opencl, sycl, wgpu, hexagon

* rm inplace optimization
2026-08-21 19:23:26 +03:00
Georgi Gerganov d68216aa3e metal : clamp K extent in tensor API mat-mat kernel for K not a multiple of 32 (llama/27450)
The Tensor API mat-mat path of kernel_mul_mm (GGML_METAL_HAS_TENSOR) fed a
static K=32 tile to the matmul2d op on every iteration. On the last, partial
K tile (ne00 % 32 != 0) the src1 slice extends past the K extent of the
tensor, and the op reads those out-of-bounds elements (undefined behavior per
the MSL specification, section 2.22.2). Depending on stale memory contents,
this corrupted the result or produced NaN.

Make the matmul2d op use dynamic_extent for K, and clamp the K extent of both
operand tensor views to the remaining valid K range (min(32, K - loop_k)) per
iteration, so the op reads exactly the valid K range on every iteration
(mirroring the tail handling of the MPP matmul2d examples). On K-aligned
inputs the clamp degenerates to the full 32-wide tile: the only difference
from the static-K op is that the dynamic-K op derives K from the operand
extents and edge-checks the tile against the tensor extents (a handful of
integer ops per iteration).

Add test-backend-ops MUL_MAT cases with K not a multiple of 32 to exercise
the unaligned K path.

Assisted-by: pi:llama.cpp/Qwen3.8-27B
2026-08-21 19:23:26 +03:00
Hongqiang Wang c16cb42f54 opencl: fix q6_K flat mul_mat for Adreno A6x/A7x GPUs with older E031 compilers (llama/26476)
* opencl: decline KV-convert flash_attn variants on Adreno A7X (compiler SIGSEGV)

The Adreno 740 (A7X) compiler E031.41 crashes inside clBuildProgram when
building the flash_attn programs whose KV path is mixed-type or dequantized:
flash_attn_f32_f16, flash_attn_f32_q8_0, flash_attn_f32_q4_0. It is a driver
crash rather than a compile-error return, so build_program_from_source_ex()
cannot catch it. The uniform f32 and f16 programs build correctly.

Decline the three KV-convert variants on the A7X in supports_op so they never
lazy-compile; those attention layers run on the CPU backend instead. Same
idiom as the existing Intel DK=512 and X1E carve-outs.

test-backend-ops FLASH_ATTN_EXT on the 740: 226 OK / 0 FAIL, previously exit
139. Other parts are unaffected - the gate is dead code there.

* opencl: fix q6_K flat mul_mat on older Adreno E031 compilers, gated

kernel_mul_mv_q6_K_f32_flat produces ~10x-wrong output on the older Adreno
E031 compilers while q4_K and q5_K are correct. Four codegen defects, each
confirmed on-device against the CPU reference:

  1. 64-bit ulong arithmetic is miscompiled, so every weight and scale read
     hit the wrong address - the primary cause, and why q5_K (int offsets)
     was unaffected. The block index is computed in int and widened only
     inside the pointer expression.
  2. The vectorized dequant (int4/float4 bit-ops, convert_*4, dot()) is
     miscompiled; the 6-bit weights are reconstructed and the dot done
     scalar.
  3. vload4 of the f32 activations is miscompiled; replaced by a
     scalar-indexed load.
  4. The accumulation is miscompiled unless a side effect forces the partial
     sums to materialize. A printf under a guard the compiler cannot prove
     false acts as a zero-cost optimizer barrier; its placement is
     load-bearing.

The defect tracks the compiler, not the GPU generation: it reproduces on
E031.38 (Adreno 642L) and E031.41 (Adreno 740) and is fixed by E031.45
(Adreno 619), so the workarounds are gated on the compiler version. Where
they are not needed they cost real throughput - 42.4 -> 35.1 GFLOPS on an
Adreno 840 q6_K GEMV. The explicit compiler-type check is required, not
redundant: newer_than_or_same() is false for every non-E031 compiler, so
negating it alone would enable the workarounds on E17 and DX.

test-backend-ops MUL_MAT is 919/919 on the Adreno 740, 642L, 619, 840 and
850; the 740 and 642L were 909/919 before. The 642L additionally needs the
A6X per-kernel-program support to reach these tests at all.
2026-08-21 19:23:26 +03:00
lhez 73c2b7ec6f opencl: fix local size for norm (llama/27339) 2026-08-21 19:23:26 +03:00
Jeff Bolz 8539d72ffa vulkan: FA MMQ should use fp32 for Q quantization calculations (llama/27413)
Codex found that qd could be a denorm and 1/qd would overflow.
2026-08-21 19:23:26 +03:00
Georgi Gerganov 60f14a5ecc metal : dequant kv cache only for large batches (llama/27438) 2026-08-21 19:23:26 +03:00
Oliver Simons 292241818a CI: Use LLVM's OpenMP over MSVC_DEBUG_non_redist on Windows (llama/26678)
* CI: Use LLVM's OpenMP over MSFT_DEBUG_non_redist on Windows

Currently, we ship the non-redist debug version of microsoft's libomp.
This PR changes this to official LLVM's release, also packaging
the license as needed.

* Remove LLVM SHA from job name to increase legibility

* Add temp validations to CI

* Revert "Add temp validations to CI"

This reverts commit eef97c88b5bac280803ebb3c3b7bb09f89b0fd88.

* Build OpenMP in CI

* Make OpenMP fetch self-contained in cmake and cache in CI

* Robustify Licens-packaging

1. Ship OpenMP license, not LLVM's.
2. Invalidate cache also on checksum of the license

* Remove stale reference in docs/build.md

* No longer package base license in release

This was scope-creep

* Add explanatory comment to OpenMP license

* Remove arm64 smoke

Forgot this during conflict resolution during rebase of
c54c0e9cf6030a5a54ce8bdd81b3e146d9787d42

* Remove GGML_OPENMP_FETCH_CACHE_DIR as requested by @CISC

* whitespace changes
2026-08-21 19:23:26 +03:00