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sycl: Update gate logic for Alchemist GPUs regarding OneDNN features. (llama/26635) 

* feat: updated gating logic of fattn-onednn.cpp

* verified device types

* Update ggml/src/ggml-sycl/fattn-onednn.cpp

Accepted recommendations to add bmg_g31 arch.

Co-authored-by: Neo Zhang <zhang.jianyu@outlook.com>

* Improved SPDA gate, added documentation.

* Added arch var to reworked gate, fixing build errors.

* Fix trailing whitespaces.

---------

Co-authored-by: Neo Zhang <zhang.jianyu@outlook.com>
This commit is contained in:
HumerousGorgon 2026-08-21 13:16:29 +08:00 committed by Georgi Gerganov
parent f19250e5ac
commit af74f97965
1 changed files with 11 additions and 8 deletions
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19
ggml/src/ggml-sycl/fattn-onednn.cpp
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@ -21,14 +21,6 @@ bool ggml_sycl_flash_attn_ext_onednn_supported(const ggml_tensor * dst) {
if (!g_ggml_sycl_fa_onednn) {
return false;
}
// Battlemage (Xe2) only, for now. On other Intel archs oneDNN's fused SDPA returns wrong results
// for some shapes (e.g. head_dim=64 on Arc / xe_hpg) -- an oneDNN bug tracked upstream at
// https://github.com/uxlfoundation/oneDNN/issues/5510. Remove this hardware limitation once that
// is fixed; until then non-BMG archs fall back to the existing FA kernel.
const gpu_arch arch = ggml_sycl_info().devices[ggml_sycl_get_device()].hw_info.arch;
if (arch != gpu_arch::intel_gpu_bmg_g21 && arch != gpu_arch::intel_gpu_bmg_g31) {
return false;
}
const ggml_tensor * Q = dst->src[0];
const ggml_tensor * K = dst->src[1];
const ggml_tensor * V = dst->src[2];
@ -60,6 +52,17 @@ bool ggml_sycl_flash_attn_ext_onednn_supported(const ggml_tensor * dst) {
}
}
}
// This is the improved SPDA gate. Rather than gating Alchemist GPUs from all SPDA features, we instead target only the failing shapes.
// If the GPU being assessed isn't in the grouping below, it has full access to all SPDA shapes. Otherwise, if it's an Alchemist GPU, we block only the shapes with head sizes that fail.
// It is much easier to compare the device to a small list of failing cases than to define all the passing ones.
const gpu_arch arch = ggml_sycl_info().devices[ggml_sycl_get_device()].hw_info.arch;
bool support_spda = !(arch == gpu_arch::intel_gpu_dg2_g10 ||
arch == gpu_arch::intel_gpu_dg2_g11 ||
arch == gpu_arch::intel_gpu_dg2_g12);
if (!support_spda && K->ne[0] == 64) {
return false;
}
// Optional KV-length ceiling (GGML_SYCL_FA_ONEDNN_MAX_KV, 0 = unlimited). Escape hatch:
// very long sequences make the fused SDPA slow enough to risk the xe driver watchdog on
// some stacks; past the cap we fall back to the native FA kernel instead.