Commit Graph

4926 Commits

Author SHA1 Message Date
Hongqiang Wang b8c8175f3e
opencl: exclude some moe kernels on Adreno a7x (llama/25698)
* opencl: exclude Adreno A7x from using Adreno MoE kernels

Some compilers for A7x devices miscompile the repack kernels, corrupting
the weights and causing MoE models to generate garbage output

* opencl: exclude A6x and unknown Adreno from MoE weights repack
2026-07-30 16:31:42 +03:00
fairydreaming 7ea23ebc7d
cuda : CUDA GGML_OP_LIGHTNING_INDEXER implementation (generic vector kernel + wmma kernel) (llama/25545)
* cuda : CUDA GGML_OP_LIGHTNING_INDEXER implementation (generic vector kernel + wmma kernel)

* chore : remove indentation of #pragma unroll

* cuda : remove unnecessary kernel template declarations

* cuda : add WARPS_PER_BLOCK and K_VECS_PER_BLOCK template parameters in lightning indexer kernels to avoid duplication of constants.

* cuda : relax MMA architecture requirements to Turing in lightning indexer implementation

* chore : renamed variables

* chore : rename ggml_cuda_op_lightning_indexer() to ggml_cuda_lightning_indexer()

* chore : TODO for AMD rocWMMA

* chore : whitespace formatting

* chore : another variable rename to fix problems caused by shadowing

* chore : yet another rename, this time uppercased all constants

* cuda : added alignment checks for Q and K tensors in lightning indexer implementation

---------

Co-authored-by: Stanisław Szymczyk <sszymczy@gmail.com>
2026-07-30 16:31:42 +03:00
Hongqiang Wang c4a15ec197
opencl: fix two issues on flash attention for Adreno a7x (llama/25697)
* opencl: route `sub_group_shuffle_xor` to qcom ext when KHR ext is unavailable

KHR `sub_group_shuffle_xor` is not defined by compiler when
`cl_qcom_subgroup_shuffle` is present, causing certain FA
kernels fail to build. Define the KHR shuffle_xor using
the qcom extension.

* opencl: skip FA kernels with mixed and quant types for A7x to avoid compiler crash
2026-07-30 16:31:41 +03:00
leonardHONG f9d97c34d2
CUDA: tighter MMQ src1 buffer size for native fp4 (llama/25613) 2026-07-30 16:31:41 +03:00
fairydreaming 8096ba6a0c
cuda : relax tensor contiguity requirements for quantized concat (llama/25678)
* cuda : relax tensor contiguity requirements for quantized concat

* tests : add test cases for non-contiguous quantized concat

* ggml : relax contiguity requirements for quantized concat

---------

Co-authored-by: Stanisław Szymczyk <sszymczy@gmail.com>
2026-07-30 16:31:41 +03:00
Pascal e376ba3ad8
metal: fuse snake activation (mul, sin, sqr, mul, add) (llama/25459)
* metal: fuse snake activation (mul, sin, sqr, mul, add)

Mirror the CUDA, Vulkan and CPU snake fusion: same matcher on the naive
5-op chain, same F32 contract on a and inv_b, same F32/F16/BF16 kernel
with F32 compute. Follows the Metal backend idioms: bf16 instantiation
gated behind GGML_METAL_HAS_BF16 and concurrency ranges checked on the
remaining chain nodes before encoding, as done by the bin fusion.

Covered by the existing backend-agnostic SNAKE_FUSE tests.

* metal: absorb snake fusion into ggml_metal_op_bin

Extract the matcher to ggml_metal_op_can_fuse_snake, mirroring the
Vulkan naming, and dispatch the fused path from ggml_metal_op_bin.
The encode loop switch is back to a single call per case.

Address review from ggerganov

* metal: fix indentation in ggml_metal_op_can_fuse_snake
2026-07-30 16:31:41 +03:00
Michael Lamothe aadab83f65
ggml: add f16 out_prod support for CPU and out_prod op for Vulkan (llama/23997) 2026-07-30 16:31:41 +03:00
Neo Zhang af80afa4d0
sycl : fix get_rows Q2_K, Q4_K, Q5_K (llama/25656) 2026-07-30 16:31:41 +03:00
Neo Zhang b446531fd5
sycl : support kernel type fp16 for conv2d_dw (llama/25653) 2026-07-30 16:31:40 +03:00
Andrew Smith 15b52ca525
sycl : implement xielu op (llama/25550) 2026-07-30 16:31:40 +03:00
Francois Dugast af1fe65ced
sycl: Increase minimum buffer size for USM system allocations (llama/25525)
Raise the threshold for minimum buffer size from 1 GiB to 4 GiB, based
on real-world experiments of overcommitting device memory with model
weights larger than available VRAM, for example Qwen3.5-35B-A3B-Q8
running on a B70.

Also add a debug message to better track USM system allocations.

Signed-off-by: Francois Dugast <francois.dugast@intel.com>
2026-07-30 16:31:40 +03:00
hmscider 4ff381d674
Flash Attention with XMX engine via oneDNN (llama/25222)
* [SYCL] F16 (default) Flash Attention with XMX engine via oneDNN graph API; Qwen3.6-27b-Q8_0 prefill speed up x1.21 at p=512 and x4.26 at p=80k

* [SYCL] Address review on FA oneDNN path. Result: llama-bench---pp512; 32% increase with fa1; llama-perplexity---0.11% difference; tested model: mradermacher/Meta-Llama-3.1-8B-Instruct-Q8_0.gguf

* PR-25222 revision v2: addressed audits

* [SYCL] flash-attn oneDNN SDPA KV F16 rev 3.0: add BMG gate + multi-device sync. Narrow the scrope of this PR to Battlemage only (bmg; Xe2). Other archs (e.g., alchemist) fall back to existing FA kernel. When device_count >1, apply stream -> wait_and_throw(), validated working path for multi-gpu sync fix by @maxious.

Co-authored-by: maxious <81432+maxious@users.noreply.github.com>

* updated comment on bmg gate, noted the issue

---------

Co-authored-by: scientist3 <scientist.3@users.noreply.github.com>
Co-authored-by: hmscider <hmscider@users.noreply.github.com>
Co-authored-by: maxious <81432+maxious@users.noreply.github.com>
2026-07-30 16:31:40 +03:00
Hongqiang Wang a46de2e627
opencl: do not use `clCreateBufferWithProperties` when targeting CL 2.x (llama/25673) 2026-07-30 16:31:40 +03:00
Hongqiang Wang ff6847f45e
opencl: handle OOB write in noshuffle GEMV kernels (odd ne01) (llama/25640) 2026-07-30 16:31:40 +03:00
Hongqiang Wang d44b96cce1
opencl: avoid the vec path in GEMV for unaligned row stride (llama/25671)
The f16 GEMV kernels take a vectorized path for ne00 >= 128 that casts the row
pointers to half4 or float4. When the row stride is not aligned, the wide load
becomes misaligned. On devices that require natural alignment for vector loads,
the kernel reads garbage. This is the case Intel GPUs and the kernels produce
incorrect results there. Adreno happpens to be byte addressable and the kernels
happen to work.
2026-07-30 16:31:39 +03:00
Chyan d3cdee1205
hexagon: fix hmx-queue signal enum-narrowing problem (llama/25677) 2026-07-30 16:31:39 +03:00
Hongqiang Wang 0ffd499202
opencl: fix a dp4a bug for devices where cl_khr_integer_dot_product is unavailable (llama/25639)
* opencl: do not fail backend init on devices without cl_khr_integer_dot_product

* opencl: do not call dp4 kernels when dp is unavailable

---------

Co-authored-by: Li He <lih@qti.qualcomm.com>
2026-07-30 16:31:39 +03:00
Jeff Bolz d4c391bb19
vulkan/cpu: Support f16 as SET_ROWS src. (llama/25432)
* vulkan/cpu: Support f16 as SET_ROWS src.

This adds full support for f16 SET_ROWS (equivalent to f32) to vulkan and CPU
backends, and adds more backend tests.

* Set DenormPreserve 16 when supported, to try to fix failures on Intel

* tune error threshold

* update metal supports_op
2026-07-30 16:31:39 +03:00
fairydreaming 387aa8946e
ggml : add a set of functions for checking contiguity of inner tensor dimensions (llama/25650)
Co-authored-by: Stanisław Szymczyk <sszymczy@gmail.com>
2026-07-30 16:31:39 +03:00
JusteLeo c766b6bf48
ggml: uniformize im2col dst_type for all conv ops (llama/23660)
* ggml: uniformize im2col dst_type for all conv ops

* Update ggml/src/ggml.c

Co-authored-by: Georgi Gerganov <ggerganov@gmail.com>

* ggml : uniformize im2col casting logic across all conv ops

* fix : allow im2col_f16 to accept any kernel type

---------

Co-authored-by: Georgi Gerganov <ggerganov@gmail.com>
2026-07-30 16:31:39 +03:00
Charles Xu 7f75229280
kleidiai : add SME2 f32 kernel (llama/24414)
* kleidiai : add SME2 f32 kernel

* enable dynamic scheduling for SME2 f32 kernel
2026-07-30 16:31:38 +03:00
Titaniumtown e4567a6633
sycl: set fattn_vec_nthreads to 256 for Battlemage (llama/25205)
Currently detects lunarlake + battlemage / xe2 and
sets the value to 256.

Keeps default at 128, Intel's ARC Alchemist's prefered value.
2026-07-30 16:31:38 +03:00
Pasha Khosravi f5f0b6415d
metal : add Q2_0 support (llama/25419) 2026-07-30 16:31:38 +03:00
Johannes Gäßler dac3141add
CUDA: refactor MMQ kernel configuration (llama/24127)
* CUDA: refactor MMQ kernel configuration

* fix Blackwell config

* remove legacy code
2026-07-30 16:31:38 +03:00
Jeff Bolz 9a18c7c0b9
vulkan: Use native e2m1 and e4m3 conversions for mxfp4/nvfp4 (llama/25338)
This uses the new VK_EXT_shader_ocp_microscaling_types extension to do fp4 type
promotions, and also uses the float8 extension to do ue4m3 promotions for
nvfp4. It's reasonable to assume that an implementation that supports fp4 will
also support fp8, so we don't need to handle all possible combinations of
support.
2026-07-30 16:31:38 +03:00
QuintinShaw 56bccf6083
gguf : add tensor shape accessor (llama/24405)
* gguf : add tensor shape accessors

* gguf : return tensor shape as const int64_t *

* gguf : remove n_dims accessor, keep only gguf_get_tensor_ne
2026-07-30 16:31:38 +03:00
Frosty40 6b3f12269c
sycl: add fused top-k MoE (llama/25217)
* sycl: add fused top-k MoE

* sycl: address review: GGML_SYCL_ENABLE_FUSION env, move fusion dispatch to topk-moe

* sycl: print GGML_SYCL_ENABLE_FUSION at startup like other env vars

Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>

---------

Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
2026-07-30 16:31:37 +03:00
Todd Malsbary 56e0229664
sycl: add Q2_K to DMMV reorder path (llama/25064)
Signed-off-by: Todd Malsbary <todd.malsbary@intel.com>
2026-07-30 16:31:37 +03:00
Rohit Mahesh dbe941f2b9
gguf : reject empty metadata keys (llama/24917) 2026-07-30 16:31:37 +03:00
cphlipot f00dc30f2c
cuda: Don't crash when querying memory on device with no free memory. (llama/25157)
If a Cuda device has no or limited available memory, the actual call
to cudaMemGetInfo() itself can cause a fatal crash due to a cuda out
of memory error (there is not enough memory to actually query memory)

This causes an issue because we query memory for all devices at
startup even if the user isn't trying to use the device for inference.

Fix this by making the error non-fatal and assigning zero total/free
memory to the device. This will have the downstream effect of the fit
algorithm not trying to put any layers on it, which is desired outcome
vs hard crashing.

this also prevents crashes in cuda enabled builds when user explicitly
passes '-dev none'
2026-07-30 16:31:37 +03:00
fairydreaming 19c96ad196
ggml : add GGML_OP_LIGHTNING_INDEXER that implements DeepSeek V3.2/V4 lightning indexer (llama/24231)
* ggml : add GGML_OP_LIGHTNING_INDEXER that implements DeepSeek V3.2/V4 lightning indexer

* ggml : remove scale parameters from lightning indexer OP, add f16 mask parameter

* tests : add GGML_OP_LIGHTNING_INDEXER tests

* ggml : bump RPC version

* chore : check if lightning indexer input tensors are not transposed

* tests : count flops instead of bandwidth in lightning indexer test

* chore : add missing const

* chore : whitespace

* ggml : renamed variables in CPU lightning indexer implementation

* ggml : fix lightning indexer mask broadcasting

* tests : tests for lightning indexer mask broadcasting

* chore : whitespace

* llama : use GGML_OP_LIGHTNING_INDEXER in DeepSeek V3.2 and DeepSeek V4 models

---------

Co-authored-by: Stanisław Szymczyk <sszymczy@gmail.com>
2026-07-30 16:31:37 +03:00
Raman Shinde 4bc66b579f
Vulkan: route large matmuls to medium tile on Adreno (llama/24877)
* [Vulkan] Fixes llama-cli breaking over longer promts sizes

The llama-cli was breaking for longer promts sizes for q4_0 quantized networks. Causing due to insufficient shared memory.

* Removed the un-used Adreno device

* Updated matmul for small pipeline.
2026-07-30 16:31:37 +03:00
Hongqiang Wang ea8085373a
opencl: add int8 dp4 dense and MoE prefill optimization for Adreno GPUs (llama/25537)
* opencl: add int8 dp4 dense and moe GEMM

* opencl: refactor

---------

Co-authored-by: Li He <lih@qti.qualcomm.com>
2026-07-30 16:31:37 +03:00
Max Krasnyansky e1993f4ad3
hexagon: improve ARGSORT performance for small tensors (llama/25512)
* hex-sort: add efficient bitomic sort in hvx regs up to 1024 elements

* hex-sort: fix inverted vrors

* hex-sort: specialize sort functions for the common cases

* hex-sort: add tracing and local context
2026-07-30 16:31:36 +03:00
Martin Chang 9d65d9fb3f
ggml-et: Initial ET backend (llama/24179)
* ggml-et: Add performance logging

* ggml-et: Quants helpers

* ggml-et: Add MUL_MAT kernel

* ggml-et: Add ROPE kernel

* ggml-et: Add RMS_NORM kernel

* ggml-et: Add GLU kernel

* ggml-et: Add SOFT_MAX kernel

* ggml-et: Add GET_ROWS kernel

* ggml-et: Add CONT kernel

* ggml-et: Add SET_ROWS kernel

* ggml-et: Add MUL_MAT_ID kernel

* ggml-et: Build et kernels as part of ggml

* ggml-et: Embed kernels with fs fallback

* ggml-et: Build fixes

* ggml-et: Add MUL_MAT F32xF32 op

* ggml_et: Add MUL_MAT_ID op

* ggml-et: Disable offloading for debug

* ggml-et: Refactor out block ops

* ggml-et: ggml backend API changes

* ggml-et: Add RESHAPE/TRANSPOSE to supported

* ggml-et: Add CONT_F16

* ggml-et: Add supported ops doc

* gglm-et: Initial doc

* ggml-et: Remove  runtime import hacks

We can now import the runtime by a simple find_package(), so we
can cleanup the CMakeLists.txt.

* ggml-et: Fix GET_ROWS kernel

Fix lost batch dimension.

Also clean vibe-comments.

* ggml-et: Fix SET_ROWS kernel

Remove incorrect broadcasting guard.

* ggml-et: Use custom instruction for fp32->fp16

* ggml-et: Vectorize set_rows fp32->fp16

* ggml-et: Fix ROPE kernel (yarn)

ggml-et: fix et_logf

WIP: Fix ramp

WIP: fix ROPE!

* ggml-et: Better sinf

* ggml-et: Fix SOFT_MAX

Add `max_bias` and `sink` support.

* ggml-et: Fix CONT

Reorder from contiguous write to read with atomic stores.

* ggml-et: Fix elmap kernel

Remainder handlin

* ggml-et: Fix MUL_MAT MUL_MAT_ID remainders

* ggml-et: Fix ET-SOC reference

* ggml-et: Fix embed kernels scripts for old python

This allows GGML-ET to build on pre-3.8 python.

* Add sysemu support with compile time flag `-DGGML_ET_SYSEMU=ON` (llama/6)

* Example using ET-Soc-1 emulator configuration

Example usage:
```bash
cmake -B build -DGGML_CUDA=OFF -DGGML_ET=ON -DLLAMA_CURL=OFF -DGGML_CCACHE=ON
cmake --build build --config Release -j $(nproc)

time ./build/bin/test-backend-ops

./build/bin/llama-server \
    --model Qwen3-0.6B-Q8_0.gguf \
    --alias Qwen3-0.6B-Q8_0 \
    -fa 0 \
    --ctx-size 1024 \
    --no-warmup \
    --host 127.0.0.1 \
    --port 8080
```

* build: proper dep tracking for kernels

* support host using MOLD linker

* initial multi core GET_ROW F32 implementation

* vectorized q8 dequant

* wip: cland warning clenaups and initial logging refactor

* wip: message default message cleanup

* chore: message cleanups

* cmake cleanup

* migrate to use platform provided functions

* cmake back into subdir

* support et_print() in kernels

* fix: repair kernel building

* perf: operations run async by default

* debug: proper kernel dep tracking and error detection on kenrel launch

* fix: kernel binary dep tracking and fixing get_rows_f32 erroring

* perf: back to doing async kernel runs by default

* perf: vectorize and parallel device memset

* merge matmul work

* misc: align allocation and enable all offload

* misc: delete deadcode and respect memory limits

* fix: repair tensor debug print

* fix: loosen RMS_NORM op percision

* feat: Q4_0 GET_ROWS

* perf: FP32 MUL_MAT using TensorFMA

* update limitations

* perf: redue L1 load in compute_block_dot_product_q8_0

* feat: save kernel mapping (name to id) when profiling is enabled

* chore: memops cleanup

* perf: parallelize softmax by rows

* perf: vectorize 2nd phase of softmax

* perf: ban GET_ROWS from offloaded

* perf: vectorize and non-atomic for eltwise ops and sub support

* perf: vectorize normal rope

* perf: glu runs in parallel

* merge: manually merge saqib's work on kernel fixes

* perf: more vectorized RoPE

* perf: parallelize mul_mat_id

* perf: parallelize set_rows_f32

* perf: vectorize softmax

* feat: support kernel fusion and fuse RMS_NORM + MUL

* fix: mostly resolve test-backend-ops failure in SOFT_MAX and ROPE

* fix: bump max rope dims for gemma

* feat: GeGLU and SCALE support to fully offload Gemma

* perf: faster device memset

* feat: get_rows supporting Q4_K and avoid cont cache coherent issues

* better F32 MM

* feat: NORM for ET backend

* feat: SQR for ET backend

* feat: UNARY on ET

* feat: el_map support broadcasting for ET

* feat: SUM_ROWS in ET backend

* feat: more ops in ET backend

* feat: WKV* operators in ET backend

* perf: parallelize operators across cacheline instead of row

* perf: parallelize get_rows on cacheline

* wip: baseline FlashAttention for ET backend

* wip: enough FA and CPY f32->f16 to run llama 3.1 fully offloaded with FA on

* feat: f16 x f16 -> f32 MM using matrix engine

* wip: f16 FlashAttention using matrix engine

* wip: clean up

* feat: barriers

* perf: optimize FA_F16 in ET

* perf: vectorize pack_k_for_transpose16

* perf: prefetch next loop matrix tile

* perf: FlashAttention 2nd MM uses TensorFMA and optimizations

* cleanup: flashattention reorg

* perf: optimizations and fixes

* feat: L2SCP API and make FlashAttention support DV = 256 for gemma

* perf: parallelize norms beyond single row

* feat: GATED_DELTA_NET support and relaxed L2_NORM requirment

* feat: loosen RMS_NORM, NORM, ROPE contingous req too

* feat: repeat supports brocasting on dim 0 and loosen cont check

* feat: FILL and DIAG operator

* feat: loosen UNARY support chcek

* feat: TRI support

* feat: SOLVE_TRI support

* feat: basic SET support

* feat: loosen CONT req

* perf: fp16_to_fp32 use ASM

* feat: IMROPE support

* feat: PAD support

* feat: global barrier

* fix: view must live on the same backend as backing tensor

* feat: relax CONCAT in ET backend

* feat: dead simple CUMSUM implementation

* feat: basic SSM_CONV support

* feat: loosen CONCAT req

* feat: relax GATED_DELTA_NET and add SET support proper

* cleanup: cleanup LCM math

* feat: SWIGLU single input

* feat: SSM_SCAN support

* feat: el_map supports non aligned tensors in best effort

* feat: basic GROUP_NORM support

* feat: loosen MUL_MAT capablities slightly

* feat: loosen MUL_MAT and GET_ROWS and add IM2COL

* feat: special case for softmax 1x1x1x1

* feat: loosen SOFT_MAX req in ET backend

* fix: el_map unaligned acse fixes

* perf: optimize zero_acc_vec in flash_attn_ext_f16_me

* perf: use hart 1 for packing in MM and FA for FP16

* feat: kernel semaphore

* perf: better instruction sequence in FlashAttention

* fix: gated_delta_net with proper masking

* perf: better parallelization for GATED_DELTA_NET

* perf: parallelize SSM_CONV over nr

* perf: vectorize SSM_CONV

* perf: optimize MUL_MAT for q8

* feat: support Gemma 4

* fix: support multi-device

* feat: broader GLU support

* feat: unary ops supports view

* fix: repair fp16 MM using matrix engine

* perf: handle large N GEMV better

* perf: better q8_0 MM

* perf: better set_rows

* add back deleted files

* fix: repair after merge

* feat: POC version of uberkernel

* feat: RMS_NORM in uberkernel

* feat: add more kernels into usage

* chore: clean up uberkernel compilation

* perf: faster flash attention

* perf: opt flash attention for large seq length

* feat: loosen op bounds. clamp and mean support

* perf: vectorize ssm_scan

* perf: slightly faster FA

* perf: FlashAttention parallel MM and load

* perf: fuse Q8 MM and ADD

* feat: basic conv kernel for ET

* softMAx_test

* set_rows_f32

* get_rows and cont

* testing

* set_rows_exp

* Junk addition

* Narrowing the issue

* Update flash_attn_ext_f16_me.c

Focusing FA_ext_f16_me

* test

* Eviction updated

* Detailed cache eviction debug

* mulmat

* removeal of `BUILD_FOR_UBERKERNEL` flag

* cleaning...

* fix: balance FCC0 count

* feat: implement mul_mat and mul_mat_id for Q4_0 type

* optimize uberkernel plan upload

* add mul_mat q4 into uberkernel

* enable gating flush to just uberkernel

* update docs for ET

* update op support for ET

* et-backend: optimize Q4_0 and Q8_0 mul_mat_id row accumulations

* et-backend: specialize mul_mat_id kernels for Q4_0 and Q8_0

* et-backend: fix RoPE YaRN corr_dim formula and handle degenerate inputs

* test-backend-ops: add DeepSeek-V2-Lite RoPE test coverage

* et-backend: add Q4_0 mul_mat matrix-engine kernel using TensorFMA32

* et-backend: vectorize Q4_0 matrix-engine dequantization

* et-backend: support hybrid matrix/vector engine execution for Q4_0 mul_mat tail

* et-backend: run partial-N tiles on matrix engine for Q4_0 mul_mat

* et-backend: route Q4_0 mul_mat N < 53 to vecdot for better prefill latency

* Update uberkernel.c

* Update unary_f32.c

* gemma 4

* bisect gemma4: enable scale_f32 only

* bisect gemma4: +rms_norm_f32

* bisect gemma4: +rms_norm_mul_f32

* bisect gemma4: disable rms_norm_mul_f32 -- BREAKS OUTPUT

* bisect gemma4: +rope_f32 (skip rms_norm_mul)

* bisect gemma4: +el_map_f32

* bisect gemma4: +softmax_f32

* bisect gemma4: +get_rows_f32

* bisect gemma4: +glu_f32

* bisect gemma4: +mul_mat_f32 +mul_mat_f32_matrix_engine

* bisect gemma4: +mul_mat_f16 +mul_mat_f16_matrix_engine

* bisect gemma4: +mul_mat_Q8_0 +mul_mat_Q4_0

* bisect gemma4: +flash_attn_ext_f32 +flash_attn_ext_f16_me

* bisect gemma4: +mul_mat_id_f32

* bisect gemma4: +sum_rows_f32

* bisect gemma4: +cont_f16

* bisect gemma4: +fill_f32

* bisect gemma4: +unary_f32 (all ops re-enabled except rms_norm_mul)

* Update rms_norm_mul_f32.c

* bisect2 gemma4 n64: +scale_f32 only

* bisect2 gemma4 n64: +rms_norm_f32 +rope_f32

* bisect2 gemma4 n64: +rms_norm_mul_f32 (with ET_UBERKERNEL eviction fix)

* bisect2 gemma4 n64: +el_map +get_rows +glu +softmax (skip rms_norm_mul)

* bisect2 gemma4 n64: all ops enabled except rms_norm_mul

* bisect2 n64: test unary+cont+fill+sum_rows (no mul_mat/flash_attn)

* bisect2 n64: +mul_mat_f32 +mul_mat_f32_matrix_engine

* bisect2 n64: +mul_mat_f16 +mul_mat_f16_matrix_engine

* bisect2 n64: +mul_mat_Q8_0 +mul_mat_Q4_0

* bisect2 n64: +mul_mat_Q8_0 only (disable Q4_0)

* bisect2 n64: +mul_mat_Q4_0 only (Q8_0 breaks)

* bisect2 n64: +mul_mat_id +flash_attn_ext (skip Q8_0)

* run-3: matmul + rms_norm_mul

* run-4

* Revert "run-4"

* run5

* changes after cleanup

* cleanup before upstream

* restrict changes into ET backend

* move kernel embedding from Python to CMake

* move uberkernel gen into CMake

* apply clang format

* update CMake style

* update to match C and C++ style

* use source ggml and quant headers instead of ET's

* MROPE support

* absorb view ops into same branch as none

* fix bad rebase

* add marty1885 to codeowners

* oops

* remove redundant newline

* fix CI editor warnings

---------

Co-authored-by: Vidas <vidas@nuolat.lt>
Co-authored-by: Gianluca Guida <glguida@tlbflush.org>
Co-authored-by: Gianluca Guida <gianluca@nekko.ai>
Co-authored-by: ubergarm <leimgrub@gmail.com>
Co-authored-by: SaqibAkram-10xE <saqib.akram@10xengineers.ai>
Co-authored-by: Rehan Qasim <rehan.qasim@10xengineers.ai>
2026-07-30 16:31:36 +03:00
Hongqiang Wang f865ccc8a8
opencl: cluster-parallel decode FA for Adreno (llama/25473) 2026-07-30 16:31:36 +03:00
fairydreaming 5635f4b5a9
ggml : process data in smaller chunks in CUDA ggml_top_k() and ggml_argsort() to reduce temporary buffers memory usage (llama/24776)
* ggml : process data in smaller chunks in CUDA ggml_top_k() implementation to reduce temporary buffers memory usage

* ggml : allocate tmp_dst only only once before the loop

* chore : whitespaces

Co-authored-by: Georgi Gerganov <ggerganov@gmail.com>

* ggml : use chunked processing in both CUDA CUB top-k and argsort implementations

* chore : separate argsort_f32_i32_cuda_bitonic() call from return statement

Co-authored-by: Johannes Gäßler <johannesg@5d6.de>

* chore : replace ternary operators with min/max

---------

Co-authored-by: Stanisław Szymczyk <sszymczy@gmail.com>
Co-authored-by: Georgi Gerganov <ggerganov@gmail.com>
Co-authored-by: Johannes Gäßler <johannesg@5d6.de>
2026-07-30 16:31:36 +03:00
Aparna M P 872f31be94
hexagon: tiling, tracing and optimizations for unary ops (llama/25474)
* hexagon: tile wide rows in pointwise unary ops to avoid VTCM overflow

* unary: reject permuted tensors for now (not used by models)

* hex-unary: replace divs with fastdiv

* hex-unary: add vtcm layout and host computed kernel params

* hex-unary: move fastdiv init into kernel params

* hex-unary: add specialized thread functions to improve generated code

* hex-unary: tracing instrumentation for unary ops

* hex-unary: factor out hvx kernels, streamline and remove more duplication

* ggml-hexagon: fix std::min collision with Windows min macro

* hex-cmake: make lto build happy

---------

Co-authored-by: Max Krasnyansky <maxk@qti.qualcomm.com>
2026-07-30 16:31:33 +03:00
Bhargav Krish 4523d0ce37
parakeet : verify hparams loaded from parakeet model bin file (#3950)
* verify hparams loaded from parakeet model bin file

* flexible way to accommodate CI as well security concern & test case addition.

* add bad model for CI tests

* removing whitespaces,couple of nits
2026-07-30 06:59:23 +02:00
Todd a630b35c6f
Adding ruby bindings change log (#3959) 2026-07-29 13:12:27 +09:00
KITAITI Makoto 97c56f1dc1
ruby : add VAD speech segments API (#3931)
* Bump version

* Add test for VAD segments API

* Implement VAD segments API

* Add signatures of VAD segments API

* Stop to dependent on mutex_m

* Check segment range for vad_segment_t0/t1

* Remove needless check

* Remove dead codes

* Fix index check for VAD segments

* Remove needless line

* Use NUM2DBL instead of RFLOAT_VALUE for safety

* Fix document

* Check type of samples

* Arrange CMake cache notation for older version

* Remove unnecessary line break

* Check return value of whisper_vad_segments_from_samples

* Fix type of VAD::Segment#start_time and #end_time

* Prevent dangling pointer from Params to VAD::Params

* Fix typos

* Update README

* Make test follow fix of impl

* Use segments_from_samples_body in ruby_whisper_vad_detect

* Run segments_from_samples without GVL

* Remove unnecessary codes

* [skip ci]Remove trailing whitespace

Co-authored-by: Daniel Bevenius <daniel.bevenius@gmail.com>

---------

Co-authored-by: Daniel Bevenius <daniel.bevenius@gmail.com>
2026-07-28 15:08:44 +09:00
Cappuccino 080bbbe852
examples : Remove leading space from txt output (#3921)
* Fix #587: Remove leading space from txt output

The BPE tokenizer used by Whisper produces tokens with leading spaces,
causing each line in the txt output to start with an unwanted space.

This fix strips leading whitespace (spaces and tabs) from each segment
when writing to txt output files, improving the readability of the
transcription output.

Fixes: https://github.com/ggml-org/whisper.cpp/issues/587
2026-07-11 17:53:59 +02:00
Georgi Gerganov 7695a53312 ggml : use ggml_vqtbl1q_u8 for 32-bit compat (#0) 2026-07-10 13:06:42 +03:00
Georgi Gerganov 289ecb05c9 talk-llama : sync llama.cpp 2026-07-10 13:06:42 +03:00
Georgi Gerganov afa6bffd2b sync : ggml 2026-07-10 13:06:42 +03:00
Georgi Gerganov 4fc2a2d922 ggml : bump version to 0.16.0 (ggml/1559) 2026-07-10 13:06:42 +03:00
Georgi Gerganov 6b17d2c05f ggml : fix conv 2d dw (llama/25490) 2026-07-10 13:06:42 +03:00
Georgi Gerganov ade3292d03 common : adapt to q2_0 (ggml/0) 2026-07-10 13:06:42 +03:00
Oliver Simons a2c50280d8 Only index by compile times + always multiply/add (llama/25445)
The first one avoids relying on compile to optimize local memory away,
and the second is cheaper than issuing control flow statements
2026-07-10 13:06:42 +03:00
Sou-ly 9cd788e703 metal : add CONV_2D_DW (depthwise convolution) support (llama/21565)
* metal : add CONV_2D_DW (depthwise 2D convolution) support

* test : add perf cases for CONV_2D_DW

* metal : use 3D dispatch for CONV_2D_DW kernel

* metal : add channel-tiled CONV_2D_DW kernel for non-contiguous layouts

* metal : simplify CONV_2D_DW dispatch and trim comments

* metal : merge duplicate CONV_2D_DW pipeline getters

* tests : add F16 CONV2D_DW tests

* cpu : fix F16 kernel support for CONV_2D_DW

* tests : remove commented-out CONV_2D_DW test block

---------

Co-authored-by: Georgi Gerganov <ggerganov@gmail.com>
2026-07-10 13:06:42 +03:00