mirror of
https://github.com/maziggy/bambuddy.git
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239 lines
8.1 KiB
Python
239 lines
8.1 KiB
Python
"""NAU7802 24-bit ADC driver for load cell / scale applications.
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I2C address: 0x2A
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Bus: /dev/i2c-1 (GPIO2/GPIO3 on RPi)
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"""
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import logging
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import os
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import struct
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import time
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import smbus2
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logger = logging.getLogger(__name__)
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def _env_int(name: str, default: int) -> int:
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value = os.environ.get(name)
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if value is None or value == "":
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return default
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try:
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return int(value)
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except ValueError:
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return default
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I2C_BUS = _env_int("SPOOLBUDDY_I2C_BUS", 1)
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NAU7802_ADDR = 0x2A
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# Register addresses
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REG_PU_CTRL = 0x00
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REG_CTRL1 = 0x01
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REG_CTRL2 = 0x02
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REG_ADCO_B2 = 0x12 # ADC output MSB
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REG_ADCO_B1 = 0x13
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REG_ADCO_B0 = 0x14 # ADC output LSB
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REG_ADC = 0x15
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REG_PGA = 0x1B
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REG_PWR_CTRL = 0x1C
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REG_REVISION = 0x1F
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# PU_CTRL bits
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PU_RR = 0x01 # Register reset
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PU_PUD = 0x02 # Power up digital
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PU_PUA = 0x04 # Power up analog
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PU_PUR = 0x08 # Power up ready (read-only)
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PU_CS = 0x10 # Cycle start
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PU_CR = 0x20 # Cycle ready (read-only)
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PU_OSCS = 0x40 # Oscillator select
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PU_AVDDS = 0x80 # AVDD source select
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class NAU7802:
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def __init__(self, bus: int = I2C_BUS, addr: int = NAU7802_ADDR):
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self._bus_num = bus
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self._bus = smbus2.SMBus(bus)
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self._addr = addr
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# CTRL2 bits for AFE calibration
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_CTRL2_CALS = 1 << 2
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_CTRL2_CAL_ERROR = 1 << 3
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def close(self):
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self._bus.close()
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def read_reg(self, reg: int) -> int:
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return self._bus.read_byte_data(self._addr, reg)
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def write_reg(self, reg: int, val: int):
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self._bus.write_byte_data(self._addr, reg, val & 0xFF)
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def _update_bits(self, reg: int, mask: int, value: int):
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cur = self.read_reg(reg)
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self.write_reg(reg, (cur & ~mask) | (value & mask))
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def _set_bit(self, reg: int, bit: int, enabled: bool):
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mask = 1 << bit
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self._update_bits(reg, mask, mask if enabled else 0)
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def _set_field(self, reg: int, shift: int, width: int, value: int):
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mask = ((1 << width) - 1) << shift
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self._update_bits(reg, mask, value << shift)
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def init(self):
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"""Initialize NAU7802 per datasheet power-on sequencing (Section 8.1).
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Datasheet steps:
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1. RR=1 (reset all registers)
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2. RR=0, PUD=1 (enter normal operation; PUD auto-starts AD conversion)
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3. Wait ~200µs for PUR=1
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4. Configure (LDO, gain, rate, etc.)
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5. Tuning (ADC chopper, PGA caps)
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6. (Optional) calibration and flush transients
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"""
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# Step 1: Reset (set RR=1, then RR=0)
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self._set_bit(REG_PU_CTRL, 0, True) # RR=1
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time.sleep(0.010)
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self._set_bit(REG_PU_CTRL, 0, False) # RR=0 exits reset
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# Datasheet says "about 200 microseconds" before PUR is set
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time.sleep(0.001)
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# Step 2: Power up digital (PUD=1 auto-starts AD conversion)
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self._set_bit(REG_PU_CTRL, 1, True) # PUD=1
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# Step 2b: Power up analog (PUA=1)
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self._set_bit(REG_PU_CTRL, 2, True) # PUA=1
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time.sleep(0.600) # Wait for LDO and analog section to stabilize
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# Step 3: Wait for power-up ready (PUR bit 3)
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for _ in range(100):
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status = self.read_reg(REG_PU_CTRL)
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if status & PU_PUR:
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logger.debug(" Power-up ready")
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break
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time.sleep(0.001)
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else:
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raise TimeoutError("NAU7802 power-up timeout (PUR bit not set)")
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# Check revision register low nibble (datasheet expects 0xF).
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revision = self.read_reg(REG_REVISION)
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logger.debug(f" Revision: 0x{revision:02X}")
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if (revision & 0x0F) != 0x0F:
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raise RuntimeError(f"Unexpected NAU7802 revision: 0x{revision:02X} (expected 0x_F)")
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# Step 4: Configure device
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# Internal LDO enable (AVDDS=1, bit 7) and set voltage to 3.0V
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self._set_bit(REG_PU_CTRL, 7, True) # AVDDS=1
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self._set_field(REG_CTRL1, shift=3, width=3, value=0b101) # VLDO=3.0V
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logger.debug(" LDO: 3.0V (internal)")
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# Set gain to 128x (CTRL1 bits 2:0 = 0b111)
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self._set_field(REG_CTRL1, shift=0, width=3, value=0b111)
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logger.debug(" Gain: 128x")
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# Set sample rate to 10 SPS (CTRL2 bits 6:4 = 0b000)
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# Note: At 10 SPS, each sample takes ~100ms; first 4 samples = ~400ms to settle
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self._set_field(REG_CTRL2, shift=4, width=3, value=0b000)
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logger.debug(" Sample rate: 10 SPS")
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# Step 5: Tuning per application notes
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# Disable ADC chopper clock (ADC bits 5:4 = 0b11)
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self._set_field(REG_ADC, shift=4, width=2, value=0b11)
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# Enable low-ESR caps on PGA (PGA bit 6 = 0 for improved accuracy)
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self._set_bit(REG_PGA, 6, False)
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# Step 6: Trigger fresh AD conversion and wait for first result
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# CS bit transition 0→1 starts fresh conversion; takes ~4-sample time for result
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self._set_bit(REG_PU_CTRL, 4, True) # CS=1
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logger.debug(" Conversion started")
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# Flush startup transients before calibration
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# At 10 SPS, initial 4 samples may contain settling artifacts
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self.flush_readings(count=4, timeout_s=1.5)
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# Run AFE calibration (internal mode), then flush result
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self.calibrate_afe(timeout_ms=1000, mode=0)
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self.flush_readings(count=2, timeout_s=1.0)
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logger.debug(" Initialization complete")
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def begin_calibrate_afe(self, mode: int = 0) -> None:
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"""Start asynchronous AFE calibration.
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mode values match NAU7802 CALMOD: 0=internal, 1=offset, 2=gain.
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"""
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ctrl2 = self.read_reg(REG_CTRL2)
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ctrl2 &= 0xFC # clear CALMOD bits[1:0]
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ctrl2 |= mode & 0x03
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self.write_reg(REG_CTRL2, ctrl2)
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# Set CALS (bit 2) to start calibration.
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self.write_reg(REG_CTRL2, self.read_reg(REG_CTRL2) | self._CTRL2_CALS)
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def wait_for_calibrate_afe(self, timeout_ms: int = 1000) -> bool:
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deadline = time.monotonic() + (timeout_ms / 1000.0) if timeout_ms > 0 else None
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while True:
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ctrl2 = self.read_reg(REG_CTRL2)
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if (ctrl2 & self._CTRL2_CALS) == 0:
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return (ctrl2 & self._CTRL2_CAL_ERROR) == 0
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if deadline is not None and time.monotonic() >= deadline:
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return False
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time.sleep(0.001)
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def calibrate_afe(self, timeout_ms: int = 1000, mode: int = 0) -> None:
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"""Run AFE calibration per datasheet CTRL2[2] CALS bit sequence.
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Datasheet says:
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- Write 1 to CALS to start (mode in CALMOD bits [1:0])
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- CALS=1 during calibration, 0 when complete
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- Check CAL_ERR bit after completion
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"""
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self.begin_calibrate_afe(mode=mode)
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if not self.wait_for_calibrate_afe(timeout_ms=timeout_ms):
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raise RuntimeError(f"NAU7802 AFE calibration timed out after {timeout_ms}ms")
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# Check CAL_ERR bit to ensure no error during calibration
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ctrl2 = self.read_reg(REG_CTRL2)
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if ctrl2 & self._CTRL2_CAL_ERROR:
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raise RuntimeError("NAU7802 AFE calibration completed with CAL_ERR set")
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logger.debug(" AFE calibration: OK")
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def wait_data_ready(self, timeout_s: float = 1.0) -> bool:
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deadline = time.monotonic() + timeout_s
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while time.monotonic() < deadline:
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if self.data_ready():
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return True
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time.sleep(0.001)
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return False
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def flush_readings(self, count: int = 4, timeout_s: float = 1.0) -> None:
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flushed = 0
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while flushed < count:
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if not self.wait_data_ready(timeout_s=timeout_s):
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raise TimeoutError("Timeout while flushing startup scale readings")
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_ = self.read_raw()
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flushed += 1
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def data_ready(self) -> bool:
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return bool(self.read_reg(REG_PU_CTRL) & PU_CR)
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def read_raw(self) -> int:
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"""Read 24-bit signed ADC value."""
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b2 = self.read_reg(REG_ADCO_B2)
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b1 = self.read_reg(REG_ADCO_B1)
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b0 = self.read_reg(REG_ADCO_B0)
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raw = (b2 << 16) | (b1 << 8) | b0
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# Sign extend 24-bit to 32-bit
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if raw & 0x800000:
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raw |= 0xFF000000
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raw = struct.unpack("i", struct.pack("I", raw))[0]
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return raw
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